搜索资源列表
para_serial
- FPGA内NIOSII核的并口，串口的初始化及其开发-NIOSII nuclear FPGA within the parallel port, serial port initialization and Development
VGA_control_verilogHDL
- 基于FPGA的VGA控制器设计。对外支持普通VGA接口，以600×480的分辨率和60Hz扫描率为例。对内支持NIOSII软核接口。
CIII_NiosII_Small
- altera fpga ep3c25器件niosii处理器最小系统，已编译通过，可直接下载-altera fpga ep3c25 processor minimum system niosii device has been compiled through direct download
GPS
- 基于ALTERA公司的NIOSII的GPS信息接收系统的设计-ALTERA company NIOSII based on the GPS receiver system design information
I2C
- I2C主机端模块 具有avalon-MT总线接口 可挂载在Altera soc系统之上 使NiosII处理器具备I2C通信能力 模块由Verilog HDL编写 并经Cyclone II FPGA测试-I2C master modul which has a avalon-MT interface that can be attached to Altera SOC system. It provides NiosII I2C communication capability . This mo
Nios_II_uCOS
- 本源码为Nios II的开发示例,主要演示基于Nios II的uCOS的移植。开发环境QuartusII。 本示例十分经典，对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of examples, mainly based on the Nios II shows the uCOS transplant. Development environment QuartusII. This example is
DDR SDRAM Design Tutorials
- Altera公司的基于NIOSII设计DDR和DDR2内存的资料，很有帮助的，-Based on Altera' s DDR and DDR2 memory NIOSII design information, useful,
Verilog000
- FPGA的学习，熟悉QuartusII软件的各种功能，各种逻辑算法设计，接口模块(RS232,LCD,VGA,SPI,I2c等)的设计，时序分析，硬件优化等，自己开始设计简单的FPGA板子。 ③、NiosII的学习，熟悉NiosII的开发流程，熟悉开发软件(SOPC,NiosII IDE),了解NiosII的基本结构，设计NiosII开发板，编写NiosII C语言程序，调试板子各模块功能。-Verilog语言的学习，熟悉Verilog语言的各种语法。 ②、FPGA的学习，熟悉
NIOSIIREV[1].0.2
- 一个很不错的学习FPGA NIOSII学习资料-A very good learning materials learning FPGA NIOSII
sopc
- 文件包括：FPGA及DSP+Builder Nios II Software User guide chinese NIOSII那些事 Nosi Ⅱ入门 SOPC系统设计入门教程-Documents include: FPGA and DSP+ Builder Nios II Software User guide chinese NIOSII those things Nosi Ⅱ entry SOPC Design Tutorial
ucos_niosii
- 在FPGA硬件体系下，搭建软核处理器NIOSII，进而用NIOSII运行ucos操作系统，从硬件到软件完全实现用户定制-In the FPGA hardware system, the structures of soft-core processor NIOSII, and then run with NIOSII ucos operating system, from hardware to software to fully implement custom
fpga-display-bmp-pictures
- 本文设计的是基于大规模FPGA的BMP图库管理，完成了数码相框的一部分功能。并且本文详细地介绍了BMP图库管理的软硬件实现，即采用Altera的CyclonII系列EP2C20F484C7作为主控芯片，内嵌32位的NiosII软核，采用SDRAM作为内存，把存储在SD卡内的二进制图片信息读入内存，并控制TFT彩色液晶，读取图片数据送到液晶上显示。整个过程的所有设备都是通过Avalon总线挂在NiosII上，在NiosII的协调下正常工作。 本作品最终能显示存入SD卡内的彩色图片信息，图
ps2
- FPGA的ps2鼠标键盘接口（NiosII组件），verilog语言编写-Ps2 mouse and keyboard interface to the FPGA (NiosII components), verilog language
FPGA-and-SOPC
- quartusII中有个sopcbulider工具，此教程很好的介绍了在DE2-70板上如何使用sopcbulider和NIOSII.-It have sopcbulider tool quartusII this tutorial a good introduction to how to use sopcbulider and NIOSII- based on the DE2-70 board.
niosII
- 基于FPGA的NIOSII视屏教程,教你学会NIOSII的开发与应用-according to FPGA leason of film
simple-mimo-encoder
- fpga niosII assembly language code for mimo encoders
niosII
- FPGA 基于niosII系统的万年历，采用C语言编写-Based on the niosII system s calendar Based on the niosII system s calendar
modelsim-with-FPGA
- 使用modelsim对基于niosII处理器的FPGA开发系统进行软硬件联合仿真的方法。个人经验总结，在Altera QII 15.1环境下描述。希望能帮到正在做类似开发的工程师。-FPGA development system for use modelsim niosII processor-based hardware and software co-simulation approach. Personal Experience, at Altera QII 15.1 descr ipt
can_loopback_test
- 实现了can控制器Verilog编程使用niosII 开发平台(Can controller Verilog programming, the use of niosII development platform)
SHA256_SYSTEM
- 利用硬件（可编程逻辑器件FPGA）实现密码算法SHA256，在FPGA中嵌入软核NIOSii，在NIOSii上进行软件编程。 硬件EDA工具为ALTERA的Quartus ii，软件IDE为eclipse（嵌在Quartua中）。(The hardware (programmable logic device FPGA) is used to implement the cryptographic algorithm SHA256, and the soft core NIOSii is em